Line 66:
Line 66:
|}
|}
−
== New Arm7/Arm9 IO registers ==
+
== New ARM9 IO registers ==
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! NAME
! NAME
Line 72:
Line 72:
! WIDTH
! WIDTH
|-
|-
−
| [[NDMA|REG_NDMA_MASTER_CNT]]
+
| [[Cameras#Camera_registers|REG_CAMUNK]]
−
| 0x04004100
+
| 0x04004200
−
| 4
+
| 2
|-
|-
−
| REG_NDMA_SRC(n)
+
| REG_CAMCNT
−
| 0x04004104 + (n*0x1c)
+
| 0x04004202
−
| 4
+
| 2
|-
|-
−
| REG_NDMA_DEST(n)
+
| REG_CAMDATA
−
| 0x04004108 + (n*0x1c)
+
| 0x04004204
| 4
| 4
+
|}
+
+
== New ARM7/ARM9 IO registers ==
+
{| class="wikitable" border="1"
+
! NAME
+
! ADDRESS
+
! WIDTH
|-
|-
−
| REG_NDMA_NUM0(n)
+
| [[NDMA|REG_NDMA_MASTER_CNT]]
−
| 0x0400410c + (n*0x1c)
+
| 0x04004100
−
| 4
−
|-
−
| REG_NDMA_NUM1(n)
−
| 0x04004110 + (n*0x1c)
−
| 4
−
|-
−
| REG_NDMA_14(n)
−
| 0x04004114 + (n*0x1c)
−
| 4
−
|-
−
| REG_NDMA_CLEAR(n)
−
| 0x04004118 + (n*0x1c)
| 4
| 4
|-
|-
−
| REG_NDMA_CNT(n)
+
| [[NDMA]] channels registers
−
| 0x0400411c + (n*0x1c)
+
| 0x04004104
−
| 4
+
| 0x70
|}
|}