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I2C Bus (view source)

Revision as of 17:06, 16 July 2013

3,138 bytes added ,  17:06, 16 July 2013
→‎REG_I2CCNT
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|}
   −
== REG_I2CDATA ==
+
== REG_I2CCNT ==
 
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
 
!  BIT
 
!  BIT
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|-
 
|-
 
| 1
 
| 1
−
| Start/device select bit?
+
| Start/device select bit? [guess from old [[I2C]] page: More data coming?]
 
|-
 
|-
 
| 2
 
| 2
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|-
 
|-
 
| 4
 
| 4
−
| SCL hold. When clear SCL is being held low, set when SCL is high. This bit must always be set after writing REG_I2CCNT.
+
| SCL hold. When clear SCL is being held low, set when SCL is high. This bit must always be set(by reading CNT again) after writing REG_I2CCNT. This bit must be set when writing blocks of data(more than 1 byte) with bit0 clear.
 
|-
 
|-
 
| 5
 
| 5
−
| SCL, toggle this for each loop iteration(in the loop execute the I2C WR code) with max 8 iterations where the loop exits successfully when bit 4 is set.
+
| SCL, toggle this for each loop iteration(in the loop execute the I2C WR code) with max 8 iterations where the loop exits successfully when bit 4 is set. This bit must be set when writing blocks of data(more than 1 byte) with bit0 clear.
 
|-
 
|-
 
| 6
 
| 6
−
| Unknown, always set when writing to CNT?
+
| Unknown, always set when writing to CNT? [guess from old [[I2C]] page: Interrupt Enable?]
 
|-
 
|-
 
| 7
 
| 7
−
| Enable/busy
+
| Enable/busy, wait for this bit to clear after writing to I2CCNT.
 
|}
 
|}
 +
 +
== REG_I2CDATA ==
 +
 +
When selecting a register, the register byte address is written here. When reading or writing data to the I2C device, it's read/written from here.
 +
When selecting a device, the device byte address is written here. Bit0 is unknown, when reading from certain devices, the device is first selected and then the register, following that the device is reselected with device byte address bit0 set.
    
== Protocol ==
 
== Protocol ==
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I2C device table:
 
I2C device table:
 
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
−
!  Device index in table
   
!  Device address
 
!  Device address
 
!  Device swiWaitByLoop delay
 
!  Device swiWaitByLoop delay
 +
!  I2CDATA bit0 set with dev addr required for reading
 
!  Device description
 
!  Device description
 
|-
 
|-
−
| 0
+
| 0x7A
 +
| 0x00
 +
| No
 +
| Camera0(internal?)
 +
|-
 +
| 0x78
 
| 0x00
 
| 0x00
 +
| No
 +
| Camera1(external?)
 +
|-
 +
| 0xA0
 
| 0x00
 
| 0x00
−
| Camera0?
+
| No
 +
| Camera0 config
 
|-
 
|-
−
| 1
+
| 0xE0
−
| 0x80
   
| 0x00
 
| 0x00
−
| Camera1?
+
| No
 +
| Camera1 config
 +
|-
 +
| 0x4A
 +
| 0x180
 +
| Yes
 +
| Power management
 
|-
 
|-
−
| 2
+
| 0x40
 
| 0x00
 
| 0x00
 +
| Yes
 +
| ?
 +
|-
 +
| 0x90
 
| 0x00
 
| 0x00
 +
| Yes
 
| ?
 
| ?
 +
|}
 +
 +
=== Cameras ===
 +
 +
{| class="wikitable" border="1"
 +
!  REGISTER
 +
!  WIDTH
 +
!  DESCRIPTION
 
|-
 
|-
 +
|  0x18
 +
|  2
 +
|  Unknown
 +
|-
 +
|  0x98c
 +
|  2
 +
|  Unknown
 +
|-
 +
|  0x990
 +
|  2
 +
|  Unknown
 +
|}
 +
 +
=== Cameras Config ===
 +
 +
{| class="wikitable" border="1"
 +
!  REGISTER
 +
!  WIDTH
 +
!  DESCRIPTION
 +
|-
 +
|  0xc1
 +
|  8
 +
|  Data from the below camconf_c1 structure is written here.
 +
|}
 +
 +
==== camconf_c1 ====
 +
Data is retrieved from this struct via this byte-offset: (conf_type*0x30) + (conf_index*8). Max number of conf types and conf indexes are 2 and 6.
 +
{| class="wikitable" border="1"
 +
!  CONF TYPE
 +
!  CONF INDEX
 +
!  DATA
 +
!  DESCRIPTION
 +
|-
 +
| 0
 +
| 0
 +
| 38 30 1F 1F 2C 30 1F 1F
 +
| ?
 +
|-
 +
| 0
 +
| 1
 +
| 38 30 1F 1F 38 30 1F 1F
 +
| ?
 +
|-
 +
| 0
 +
| 2
 +
| 2C 30 1F 1F 2C 30 1F 1F
 +
| ?
 +
|-
 +
| 0
 
| 3
 
| 3
−
| 0x00
+
| 2C 30 1F 1F 2C 30 1F 1F
−
| 0x00
   
| ?
 
| ?
 
|-
 
|-
 +
| 0
 
| 4
 
| 4
−
| 0x7A
+
| 2C 30 1F 1F 2C 30 1F 1F
−
| 0x180
+
| ?
−
| Power management
   
|-
 
|-
 +
| 0
 
| 5
 
| 5
−
| 0x78
+
| 2C 30 1F 1F 2C 30 1F 1F
−
| 0x00
+
| ?
 +
|-
 +
| 1
 +
| 0
 +
| 30 28 18 18 34 28 08 18
 +
| ?
 +
|-
 +
| 1
 +
| 1
 +
| 30 28 18 18 30 28 08 18
 +
| ?
 +
|-
 +
| 1
 +
| 2
 +
| 28 28 18 18 28 28 08 18
 +
| ?
 +
|-
 +
| 1
 +
| 3
 +
| 28 28 18 18 28 28 08 18
 
| ?
 
| ?
 
|-
 
|-
−
| 6
+
| 1
−
| 0xA0
+
| 4
−
| 0x00
+
| 28 28 18 18 28 28 08 18
 
| ?
 
| ?
 
|-
 
|-
 +
| 1
 +
| 5
 +
| 28 28 18 18 28 28 08 18
 +
| ?
 
|}
 
|}
   −
=== Power management addr 0x7A ===
+
=== Power management ===
−
When registers 0x70 and 0x11 are set to 1 in that order, a power cycle is done.
+
When register 0x11 has value one written to, a power cycle is done. When reg 0x70 val 1 is written before reg 0x11, sysmenu/launcher doesn't display the heath screen, otherwise when not written with the register value left at zero the health screen is displayed. Reg 0x70 would be zero on hard boot, when any twlsdk app does a system reset it writes value 1 to reg 0x70.
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
 
!  REGISTER
 
!  REGISTER
 +
!  WIDTH
 
!  DESCRIPTION
 
!  DESCRIPTION
 +
|-
 +
|  0x0
 +
|  1
 +
|  Unknown, battery related? Usually this reg val is 0x33?
 +
|-
 +
|  0x10
 +
|  1
 +
|  Power flags. When bit0 is set, arm7 does a system reset. When bit1 or bit3 are set, arm7 does a shutdown. Bits 0-2 are used for DSi [[Interrupts|IRQ6]] IF flags.
 
|-
 
|-
 
| 0x11
 
| 0x11
−
| System reset register 2.
+
| 1
 +
| Power reg? Writing value 1 here does a system reset. Writing value 2 powers off all DSi-only hw.
 
|-
 
|-
 
| 0x12
 
| 0x12
−
| MMC bus power? When value 1 is written here power to the MMC bus is disabled?(Enabling MMC power on hybrid cards will do nothing, since the bus is disabled via other registers.) Value 0 might enable MMC bus power?
+
| 1
 +
| Might be MMC bus power related, unknown.
 +
|-
 +
|  0x20
 +
|  1
 +
|  Battery flags. When zero the battery is at critical level, arm7 does a shutdown. Bit7 is set when the battery is charging. Battery levels in the low 4-bits: battery icon bars full 0xF, 3 bars 0xB, 2 bars 0x7, one solid red bar 0x3, and one blinking red bar 0x1. When plugging in or removing recharge cord, this value increases/decreases between the real battery level and 0xF, thus the battery level while bit7 is set is useless.
 +
|-
 +
|  0x21
 +
|  1
 +
|  ?
 
|-
 
|-
 
| 0x31
 
| 0x31
−
| Cameras' power? Value 0 turns off power to cameras? Values 1/2 activates a camera's power?
+
| 1
 +
| External camera LED control, valid values are 0-2. Value 0 disables the LED, value 1 activates the LED, value 2 activates the LED with the LED blinking.
 +
|-
 +
| 0x40
 +
| 1
 +
| Volume level: 0x00 - 0x1F.
 
|-
 
|-
 
| 0x70
 
| 0x70
−
| System reset register 1.
+
| 1
 +
| BOOTFLG
 +
|}
 +
 
 +
=== Device 0x90 ===
 +
{| class="wikitable" border="1"
 +
!  REGISTER
 +
!  WIDTH
 +
!  DESCRIPTION
 +
|-
 +
|  0x2
 +
|  1
 +
|  Used for DSi [[Interrupts|IRQ6]] IF flags.
 +
|-
 +
|  0x4
 +
|  1
 +
|  Unknown (bit0 toggled)
 
|}
 
|}
Nocash
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