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Line 1: − {{stub}}+ − − == Specifications == − + Line 12:
Line 10: − + + + − + − === Front === + + + + + + + + + + + + + + + + + + + + + + + + + − === Back ===+ + + + − === NAND pinout ===+ + + + + + + + + + + + + + + + − === PCB overlay ===+ − === CPU with new ram === + − === Glamor Shot === + − == Test Points == − − {| class="wikitable" border="1" {{table}} − | /IRQ_0||COM1||LDG10||LS||P05||SD10_CD||SPLN||X+ − |- − | /mRST||COM2||LDG11||MC1_CLK||P06||SD10_CLK||SPLP||Y- − |- − | /WiFi_RST||DCLK||LDG12||MC1_CS||P06||SD10_CMD||SPRN||Y+ − |- − | ADPO||DET||LDG13||MC1_CS2||P07||SD10_DATA1||SPRP||YELLOW − |- − | AOUT||EXTB+||LDG14||MC1_DET||P08||SD10_DATA2||SR|| − |- − | ATH_TX_H||GCK||LDG15||MC1_IO0||P09||SD10_DATA3||TH|| − |- − | B+||GND1||LDG20||MC1_IO1||PENIRQ||SD10_DATAO||VCNT5|| − |- − | BLA1||GND2||LDG21||MC1_IO2||PM_SLP||SD10_VDD||VD18|| − |- − | BLA2||GPIO330||LDG22||MC1_IO3||PMOFF||SD10_WP||VDD-5|| − |- − | BLC1||GSP||LDG23||MC1_IO4||PVDD||SD11_CLK||VDD10|| − |- − | BLC2||HP#SP||LDG24||MC1_IO5||PWSW||SDA||VDD12|| − |- − | BLUE||HSYNC||LDG25||MC1_IO6||PWSWO||SDA1||VDD28|| − |- − | BT-||INI||LDR10||MC1_IO7||R00||SG||VDD33|| − |- − | BT+||LBD24||LDR11||MC1_IREQ||R01||SL||VDD42|| − |- − | CAM_D0||LDB10||LDR12||MC1_RES||R7||SND_MCLK||VDD5|| − |- − | CAM_D1||LDB11||LDR13||MC1_VDD||RCLK||SND_SCLK||VDET-|| − |- − | CAM_D2||LDB12||LDR14||mFE||RED||SND_SD0||VGND|| − |- − | CAM_D3||LDB13||LDR15||MIC||RESET||SND_SDI||VIN|| − |- − | CAM_D4||LDB14||LDR20||ORANGE||REV||SND_WS||VOLN|| − |- − | CAM_D5||LDB15||LDR21||P00||RICHG||SPI_CS1||VOLP|| − |- − | CAM_D6||LDB20||LDR22||P01||Rosc||SPI_CS2||VSHD|| − |- − | CAM_D7||LDB21||LDR23||P02||RTC_INT||SPI_CS3||VSYNC|| − |- − | CAM_LED||LDB22||LDR24||P03||SCK||SPI_MISO||WL_RXPE|| − |- − | CAM_RST||LDB23||LDR25||P04||SCL||SPI_MOSI||WL_TXPE|| − |- − | CKI||LDB25||LIN||P04||SCL1||SPL||X-|| − |} −
Updated Headers, added conventional pinouts for DSi and DSiXL
= Specifications =
*[[Cameras|Includes (2) 0.3 Megapixel VGA Cameras]]
*[[Cameras|Includes (2) 0.3 Megapixel VGA Cameras]]
*240MB(+16MB probably reserved for wear leveling purposes (e.g. replacing bad blocks)) Internal Flash Memory - Samsung kmapf0000m-S998 MOVI [[NAND]] - MMC Interface
*240MB(+16MB probably reserved for wear leveling purposes (e.g. replacing bad blocks)) Internal Flash Memory - Samsung kmapf0000m-S998 MOVI [[NAND]] - MMC Interface
*16MB RAM - NEC uPD 46128512AF1 - DDR SRAM or a Fujitsu 128-Mbit FCRAM 82DBS08164D-70L
*16MB RAM - NEC uPD 46128512AF1 - DDR SRAM or a Fujitsu 128-Mbit FCRAM 82DBS08164D-70L (datasheet: http://edevice.fujitsu.com/fj/DATASHEET/e-ds/e511454.pdf mirror:[[Media:E511454.pdf]]
*(2) 256 x 192 3.25 Inch Displays, one of which has a resistive touch screen
*(2) 256 x 192 3.25 Inch Displays, one of which has a resistive touch screen
*Backwards compatible with Nintendo DS games but not GBA games due to the lack of a gameboy cartridge port.
*Backwards compatible with Nintendo DS games but not GBA games due to the lack of a gameboy cartridge port.
*Mitsumi (MM3317A) or TI 72071B0 - Power supply and charger circuit ????
*Mitsumi (MM3317A) or TI 72071B0 - Power supply and charger circuit ????
*SD/SDHC Card slot
*SD/SDHC Card slot
*WiFi dongle with integrated 128KB SPI Flash for NVRAM, WiFi settings
*[[WiFi_Module]] with integrated 128KB SPI Flash for [[NVRAM]], WiFi settings
== Images ==
= Hardware Revisions =
== DSi ==
** board C/TWL-CPU-01 (Original rev, all pictures below)
** CPU: TWL. The latest date code picture I could find online was "0836 1m" as shown below, however other pictures with CPU covered show the NAND codes as late as 916, so...
** Suspect this is the only board where WiFi chip is available in Hybrid games like CookingCoach
** Wireless card DWM-W015
== DSi RevA ==
** board C/TWL-CPU-10 (Newer model, can someone provide a date or serial # range?)
** CPU: TWL A. Mine is "0940 2m". My US Serial # is ~ TW71848???[5]. If yours is earlier, please update this.
[[Image:TWL-CPU-10.png]]
== DSi XL ==
** board C/UTL-CPU-01
** CPU is TWL A
** Wireless card DWM-W024
= Images =
== Front ==
[[Image:Twl_front.jpg]]
[[Image:Twl_front.jpg]]
[[Image:Twl_front_traces.jpg|600px]]
The socket to the left of the ARM processor is the wifi chip socket.
The socket to the left of the ARM processor is the wifi chip socket.
TWL CPU pinout map: [[File:Twl_cpu_pinout.pdf]] (WIP)
== Back ==
[[Image:Twl_back.jpg]]
[[Image:Twl_back.jpg]]
== NAND Pinout ==
[[Image:Dsi_nand.jpg|600px]]
[[Image:Dsi_nand.jpg|600px]]
[[Image:Dsi_nanddat.png|600px]]
== NAND Pinout With Conventional Markings ==
===DSi===
[[Image:NAND_Compressed.jpg|600px]]
===DSi XL===
[[Image:Side_B_Marked_Compressed.png|600px]]
== PCB Overlay ==
[[Image:Nintendo DSi PCB Layered.jpg|600px]]
[[Image:Nintendo DSi PCB Layered.jpg|600px]]
== CPU with New RAM ==
[[Image:CPUv2.jpg]]
[[Image:CPUv2.jpg]]
== Glamor Shot ==
[[Image:Nintendo-dsi-Glamor-Shot.jpg]]
[[Image:Nintendo-dsi-Glamor-Shot.jpg]]
== References ==
== References ==
# http://en.wikipedia.org/wiki/Nintendo_DSi
# http://en.wikipedia.org/wiki/Nintendo_DSi
# http://insidetronics.blogspot.com/2008/11/new-nintendo-dsi-teardown.html
# http://insidetronics.blogspot.com/2008/11/new-nintendo-dsi-teardown.html