User contributions for PoroCYon

Results for PoroCYon talk block log uploads logs

A user with 81 edits. Account created on 22 August 2021.

21:1421:14, 1 February 2026 diff hist +559 DSi system flaws No edit summary current
21:0021:00, 1 February 2026 diff hist +13 DSi exploits →DSiWare (True DSi-Mode) Exploits current
21:0021:00, 1 February 2026 diff hist +57 DSi exploits No edit summary
20:5920:59, 1 February 2026 diff hist +280 DSi exploits →TWL/DSi-Enhanced Cart Exploits

18:0218:02, 30 April 2025 diff hist −37 DSi XL testpoints oops, needs a correction current

02:4502:45, 4 February 2025 diff hist −1 DSi XL testpoints No edit summary

02:4602:46, 22 January 2024 diff hist +171 Stage1 clarify error codes current

23:3823:38, 1 January 2024 diff hist +344 DSi exploits →Bootcode Exploits
23:3423:34, 1 January 2024 diff hist +483 DSi system flaws →Hardware

21:0321:03, 1 December 2023 diff hist +2 m DSi XL testpoints fix TP169 colspan
21:0221:02, 1 December 2023 diff hist +1,013 DSi XL testpoints add shorter names, used in some TWL PCB revisions
17:0117:01, 1 December 2023 diff hist −1 DSi XL testpoints →UTL-CPU-01 testpoints

22:4922:49, 1 September 2023 diff hist +2,160 WiFi Module Xtensa JTAG stuff (yeah) current
22:3222:32, 1 September 2023 diff hist +156 N File:Dwm-w015-scanlime.jpg DWM-W015, both sides of the PCB, photo taken by scanlime (source: http://www.flickr.com/photos/micahdowty/3846960965/sizes/o/in/photostream/ ) current
22:2922:29, 1 September 2023 diff hist +63 N File:Dwm-w015-bottom-marked.jpg DWM-W015 bottom side, with UART testpoints marked current
22:2922:29, 1 September 2023 diff hist +73 N File:Dwm-w015-top-marked.jpg DWM-W015 top side, marked with JTAG_nRST and EJTAG_RST pins current
22:2822:28, 1 September 2023 diff hist +216 N File:Dwm-w015-top-no-ar6002-for-dsibrew.jpg DWM-W015 top side (AR6002 desoldered) Composite of two images with different lighting direction, merged using the 'Lighten' blend mode in GNU IMP. This has been done to eliminate the effect of shadows. current
22:1322:13, 1 September 2023 diff hist +100 DSi XL testpoints wifi updates

21:3421:34, 17 August 2023 diff hist 0 m WiFi Module →Models: fix link
21:2521:25, 17 August 2023 diff hist +6 WiFi Module →DWM-W024: fix image preview to have a reasonable size
21:2421:24, 17 August 2023 diff hist 0 File:Dwm-w024.jpg PoroCYon uploaded a new version of File:Dwm-w024.jpg current
21:2121:21, 17 August 2023 diff hist +65 WiFi Module fix mention/introduction of NVRAM
21:1921:19, 17 August 2023 diff hist +1,344 WiFi Module clean up the article (wow it was a mess)
21:1821:18, 17 August 2023 diff hist +103 N File:AR6002 Atheros.pdf.zip Atheros AR6002 datasheet (DSi new WiFi chip), zipped to circumvent upload filesize limits current
21:1021:10, 17 August 2023 diff hist +42 N File:9008-pk020 Rev(B).pdf RF9008 (DS old WiFi RF chip) current
21:0721:07, 17 August 2023 diff hist +58 N File:3002 Datasheet.pdf MM3315/RFMD 3002 (DS old WiFi baseband chip) current

14:1714:17, 16 August 2023 diff hist +21 DSi XL testpoints →UTL-CPU-01 testpoints: GPIO333 isn't MUTE but controls it through U17

19:1819:18, 13 August 2023 diff hist 0 DSi XL testpoints →UTL-CPU-01 testpoints: (forgot one, sorry)
19:1819:18, 13 August 2023 diff hist 0 DSi XL testpoints →UTL-CPU-01 testpoints: fix I2S names and voltages
19:1619:16, 13 August 2023 diff hist +16 DSi XL testpoints →UTL-CPU-01 testpoints: oopsie
19:1519:15, 13 August 2023 diff hist +16 DSi XL testpoints →UTL-CPU-01 testpoints: oops forgot I2S names
19:1419:14, 13 August 2023 diff hist +737 DSi XL testpoints →UTL-CPU-01 testpoints: finished
16:3716:37, 13 August 2023 diff hist +296 DSi XL testpoints →UTL-CPU-01 testpoints: clarify camera stuff
16:2216:22, 13 August 2023 diff hist +562 DSi XL testpoints P16 pinout
16:1716:17, 13 August 2023 diff hist +932 DSi XL testpoints →UTL-CPU-01 testpoints: fixes + up to 182
02:3002:30, 13 August 2023 diff hist +1,058 DSi XL testpoints →UTL-CPU-01 testpoints: up to 159
00:2800:28, 13 August 2023 diff hist +800 DSi XL testpoints →UTL-CPU-01 testpoints: up to 139 + fixes

01:1401:14, 12 August 2023 diff hist +980 DSi XL testpoints →UTL-CPU-01 testpoints: up to 119

18:2918:29, 11 August 2023 diff hist +2 m DSi XL testpoints →UTL-CPU-01 testpoints: formatting fix
18:2818:28, 11 August 2023 diff hist +698 DSi XL testpoints →UTL-CPU-01 testpoints: TP8x/9x

21:2521:25, 10 August 2023 diff hist +1,750 DSi XL testpoints more stuff
01:4601:46, 10 August 2023 diff hist +69 DSi XL testpoints make self-consistent
01:4401:44, 10 August 2023 diff hist +10 DSi XL testpoints →UTL-SUB-01 testpoints: oops fix stuff

23:2223:22, 9 August 2023 diff hist +1,842 DSi XL testpoints →UTL-CPU-01 testpoints: update up to TP59
20:4420:44, 9 August 2023 diff hist +1,837 N DSi XL testpoints create page
20:2920:29, 9 August 2023 diff hist +104 Hardware link to DSi XL testpoints (also add mention of the DSP)
20:2620:26, 9 August 2023 diff hist +196 Hardware DSi XL images, word specs a bit better
20:2220:22, 9 August 2023 diff hist +56 N File:Utl-pcb-overlay.jpg Top/bottom overlay image of the DSi XL PCB current
20:0920:09, 9 August 2023 diff hist +79 N File:Utl-cpu-01-sidea.jpg DSi XL Main board (UTL-CPU-01) Side "B" (bottom, with testpoints) current
20:0820:08, 9 August 2023 diff hist +76 N File:Utl-cpu-01-sideb.jpg DSi XL Main board (UTL-CPU-01) Side "B" (top, with components) current

Retrieved from "https://dsibrew.org/wiki/Special:Contributions/PoroCYon"

Please enable JavaScript to pass antispam protection!
Here are the instructions how to enable JavaScript in your web browser http://www.enable-javascript.com.
Antispam by CleanTalk.