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Line 140: − + − + − + − + − + − (29) ILFSL IFSMSK Toshiba: ILL_FUNC Illegal SDIO Function ;SDIO only (not SD)+ − − + − The Insert/Remove bits (bit3,4, and maybe also bit8,9) exist in the "SD" − registers only, not in the "SDIO" registers (the bits should be treated as − general insert/remove flags though, no matter if the card is an SD or SDIO − card).<br> − Bit29 is SDIO related, and exist in SDIO registers only, not in SD registers. − 4004820h can be 8B7F031Dh − 4004A20h can be 8B7F031Dh
→DSi SD/MMC I/O Ports: Interrupt/Status
'''4004820h - SD_IRQ_MASK0-1 - Interrupt Mask (R/W)'''<br>
'''4004820h - SD_IRQ_MASK0-1 - Interrupt Mask (R/W)'''<br>
'''4004A20h - SDIO_IRQ_MASK0-1 - Interrupt Mask (R/W)'''<br>
'''4004A20h - SDIO_IRQ_MASK0-1 - Interrupt Mask (R/W)'''<br>
IRQ Status (0=ack, 1=request)<br>
The IRQ_STATUS registers contain acknowledge-able IRQ Flags (those bits that
IRQ Mask (0=Enable, 1=Disable)<br>
that are maskable in IRQ_MASK register), as well as static read-only status
bits without IRQ function (eg. WRPROTECT).
* IRQ Flags/Write (0=Acknowledge, 1=No change)
* IRQ Flags/Read (0=No IRQ, 1=IRQ)
* IRQ Mask (0=Enable, 1=Disable) (8B7F031Dh when all IRQs disabled)
Bit Stat Mask Function
Bit Stat Mask Function
0 SREP MREP CMDRESPEND (response end) (or R1b: busy end)
0 SREP MREP CMDRESPEND (response end) (or R1b: busy end)
1 ? - Unknown/unused/undoc
1 0 0 Unknown/unused (always 0)
2 SRWA MRWA DATAEND (is NOT set? after data read/write end bit)
2 SRWA MRWA DATAEND (is NOT set? after data read/write end bit)
3 SCOT MCOT CARD_REMOVE ;\SD only (not SDIO)
3 SCOT MCOT CARD_REMOVE (0=No event, 1=Is/was newly ejected) ;\DSi
4 SCIN MCIN CARD_INSERT ;/
4 SCIN MCIN CARD_INSERT (0=No event, 1=Is/was newly inserted) ; SD
5 undoc - SIGSTATE card/type/signal/signature detect?
5 undoc 0 SIGSTATE (0=Ejected, 1=Inserted) (SDIO: always 1) ; Card
6 ? - Unknown/unused/undoc maybe card-detect switch?
6 0 0 Unknown/unused (always 0) ; Slot
7 undoc - WRPROTECT probably write-protect switch
7 undoc 0 WRPROTECT (0=Locked/Ejected, 1=Unlocked/HalfEjected);/
8 undoc undoc CARD_REMOVE_A ;\
8 undoc undoc CARD_REMOVE_A (always 0) ;\maybe fixed state for
9 undoc undoc CARD_INSERT_A ; uh, somewhat dupes of bit3-5?
9 undoc undoc CARD_INSERT_A (always 0) ; DSi's onboard eMMC chip
10 undoc - SIGSTATE_A ;/
10 undoc 0 SIGSTATE_A (always 1) ;/(also fixed as so for SDIO)
11 ? - Unknown/unused/undoc
11 0 0 Unknown/unused (always 0)
12 ? - Unknown/unused/undoc
12 0 0 Unknown/unused (always 0)
13 ? - Unknown/unused/undoc
13 0 0 Unknown/unused (always 0)
14 ? - Unknown/unused/undoc
14 0 0 Unknown/unused (always 0)
15 ? - Unknown/unused/undoc
15 0 0 Unknown/unused (always 0)
16 SCIX MCIX CMD_IDX_ERR Bad CMD-index in response (RCMDE,SCMDE)
16 SCIX MCIX CMD_IDX_ERR Bad CMD-index in response (RCMDE,SCMDE)
17 SCRC MCRC CRCFAIL CRC response error (WCRCE,RCRCE,SCRCE,CCRCE)
17 SCRC MCRC CRCFAIL CRC response error (WCRCE,RCRCE,SCRCE,CCRCE)
21 SFUF MFUF TXUNDERRUN HOST tried read empty
21 SFUF MFUF TXUNDERRUN HOST tried read empty
22 SCTO MCTO CMDTIMEOUT Response start-bit timeout (NRS,NSR)
22 SCTO MCTO CMDTIMEOUT Response start-bit timeout (NRS,NSR)
23 ? - Unknown/unused/undoc
23 1 ? 0 Unknown/undoc (usually set?)
24 SBRE MBRE RXRDY (fifo not empty) (request data read)
24 SBRE MBRE RXRDY (fifo not empty) (request data read)
25 SBWE MBWE TXRQ (datafifoempty?) (request data write)
25 SBWE MBWE TXRQ (datafifoempty?) (request data write)
26 ? - Unknown/unused/undoc
26 0 0 Unknown/unused (always 0)
27 undoc undoc Unknown/used?! (the bit is mask-able in IRQ_MASK)
27 undoc undoc Unknown/undoc (bit27 is mask-able in IRQ_MASK)
28 ? - Unknown/unused/undoc
28 0 0 Unknown/unused (always 0)
29 undoc - DSi: Unknown/can be 1 (not exactly like below Toshiba specs)
29 1 ? 0 Unknown/undoc (usually set?) (unlike toshiba ILFSL/IFSMSK)
30 undoc 0 CMD_BUSY
30 undoc - CMD_BUSY
31 ILA IMSK Illegal Command Access (old CMD still busy, or wrong NTDT)
31 ILA IMSK Illegal Command Access (old CMD still busy, or wrong NTDT)
Acknowledge by STAT=0, or by MASK=1 (uh, really?), or by soft reset (SRST=0) or
Acknowledge by STAT=0, or by MASK=1 (uh, really?), or by soft reset (SRST=0) or
hard reset.<br>
hard reset.