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998 bytes added ,  05:10, 31 July 2009
New page: == EEPUART == The savegame exploits found in DSi enhanced games make it possible to run homebrew code, but there is a slight problem: the EEPROM can't contain much code. The solution fo...
== EEPUART ==


The savegame exploits found in DSi enhanced games make it possible to run homebrew code, but there is a slight problem: the EEPROM can't contain much code.

The solution for this is the EEPUART: An FPGA based EEPROM emulator enhanced with UART capability, for sending and receiving data from a PC.

It can be downloaded here: [[Media:EEPUART.zip|EEPUART.zip]].


This package contains HDL files for simulating an EEPROM interface for DS with JTAG UART using an Terasic DE1 board. As I did not find a good way to communicate with the JTAG UART using pure HDL, I simply chose to use a Nios processor to move data back and forth between the EEPROM module and JTAG UART. The software folder contains the code for this.
The UartSlave module is an Avalon bus memory mapped slave, to be used for the Nios processor.

The DsEeprom and DsSpi modules are very generic and can be used on other boards aswell. If your board does not have SRAM, it should be possible to use SDRAM or Flash too.
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