Difference between revisions of "IO Map"

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Line 4: Line 4:
 
!  ADDRESS
 
!  ADDRESS
 
!  WIDTH
 
!  WIDTH
 +
!  DESCRIPTION
 +
|-
 +
|  [[Interrupts|REG_IE]]
 +
|  0x04000210
 +
|  4
 +
|  Interrupt Enable Register (with new interrupt sources)
 +
|-
 +
|  REG_IF
 +
|  0x04000214
 +
|  4
 +
|  Interrupt Flags Register (with new interrupt sources)
 
|-
 
|-
 
|  [[Interrupts|REG_IE2]]
 
|  [[Interrupts|REG_IE2]]
 
|  0x04000218
 
|  0x04000218
 
|  4
 
|  4
 +
|  New Interrupt Enable Register (with more new interrupt sources)
 
|-
 
|-
 
|  REG_IF2
 
|  REG_IF2
 
|  0x0400021C
 
|  0x0400021C
 
|  4
 
|  4
 +
|  New Interrupt Flags Register (with more new interrupt sources)
 +
|-
 +
|  [[NDMA|REG_NDMA_MASTER_CNT]]
 +
|  0x04004100
 +
|  4
 +
|  New DMA Control
 +
|-
 +
|  [[NDMA]] channels registers
 +
|  0x04004104
 +
|  0x70
 +
|  New DMA Channels 0..3
 
|-
 
|-
 
|  [[AES_Engine|REG_AESCNT]]
 
|  [[AES_Engine|REG_AESCNT]]
 
|  0x04004400
 
|  0x04004400
 
|  4
 
|  4
 +
|  Encryption/Decryption Hardware...
 
|-
 
|-
 
| REG_AESBLKCNT
 
| REG_AESBLKCNT
Line 56: Line 80:
 
|  0x04004500
 
|  0x04004500
 
|  1
 
|  1
 +
|  I2C Bus Data
 
|-
 
|-
 
|  REG_I2CCNT
 
|  REG_I2CCNT
 
|  0x04004501
 
|  0x04004501
 
|  1
 
|  1
 +
|  I2C Bus Control
 
|-
 
|-
 
|  [[SNDEX|REG_SNDEXCNT]]
 
|  [[SNDEX|REG_SNDEXCNT]]
 
|  0x04004700
 
|  0x04004700
 
|  2
 
|  2
 +
|  New Sound Control
 
|}
 
|}
  
Line 71: Line 98:
 
!  ADDRESS
 
!  ADDRESS
 
!  WIDTH
 
!  WIDTH
 +
!  DESCRIPTION
 +
|-
 +
|  [[Interrupts|REG_IE]]
 +
|  0x04000210
 +
|  4
 +
|  Interrupt Enable Register (with new interrupt sources)
 +
|-
 +
|  REG_IF
 +
|  0x04000214
 +
|  4
 +
|  Interrupt Flags Register (with new interrupt sources)
 +
|-
 +
|  SCFG_A9ROM
 +
|  0x04004000
 +
|  2
 +
|  ROM Status (R)
 +
|-
 +
|  SCFG_CLK
 +
|  0x04004004
 +
|  2
 +
|  New Block Clock Control (R/W)
 +
|-
 +
|  SCFG_RST
 +
|  0x04004006
 +
|  2
 +
|  New Block Reset (R/W)
 +
|-
 +
|  SCFG_EXT
 +
|  0x04004008
 +
|  4
 +
|  Extended Features (R/W)
 +
|-
 +
|  SCFG_MC
 +
|  0x04004010
 +
|  2
 +
|  Memory Card Interface Status?
 +
|-
 +
|  MBKx
 +
|  0x04004040
 +
|  0x24
 +
|  New Shared WRAM Control (New WRAM mappable to ARM7/ARM9/DSP)
 +
|-
 +
|  [[NDMA|REG_NDMA_MASTER_CNT]]
 +
|  0x04004100
 +
|  4
 +
|  New DMA Control
 +
|-
 +
|  [[NDMA]] channels registers
 +
|  0x04004104
 +
|  0x70
 +
|  New DMA Channels 0..3
 
|-
 
|-
 
|  [[Cameras#Camera_registers|REG_CAMRST]]
 
|  [[Cameras#Camera_registers|REG_CAMRST]]
 
|  0x04004200
 
|  0x04004200
 
|  2
 
|  2
 +
|  Camera Reset
 
|-
 
|-
 
|  REG_CAMCNT
 
|  REG_CAMCNT
 
|  0x04004202
 
|  0x04004202
 
|  2
 
|  2
 +
|  Camera Control
 
|-
 
|-
 
|  REG_CAMDATA
 
|  REG_CAMDATA
 
|  0x04004204
 
|  0x04004204
 
|  4
 
|  4
−
|}
+
| Camera Data
−
 
+
|-
−
== New ARM7/ARM9 IO registers ==
+
|  REG_CAM_?
−
{| class="wikitable" border="1"
+
|  0x04004210
−
! NAME
+
| 4
−
! ADDRESS
+
| Camera ?
−
! WIDTH
 
 
|-
 
|-
−
|  [[NDMA|REG_NDMA_MASTER_CNT]]
+
|  REG_CAM_?
−
|  0x04004100
+
|  0x04004214
 
|  4
 
|  4
 +
|  Camera ?
 
|-
 
|-
−
|  [[NDMA]] channels registers
+
|  DSP_xxx
−
|  0x04004104
+
|  0x04004300
−
|  0x70
+
|  0x3X
 +
|  XpertTeak DSP coprocessor (CEVA Inc.)
 
|}
 
|}

Revision as of 15:17, 16 July 2013

New ARM7 IO registers

NAME ADDRESS WIDTH DESCRIPTION
REG_IE 0x04000210 4 Interrupt Enable Register (with new interrupt sources)
REG_IF 0x04000214 4 Interrupt Flags Register (with new interrupt sources)
REG_IE2 0x04000218 4 New Interrupt Enable Register (with more new interrupt sources)
REG_IF2 0x0400021C 4 New Interrupt Flags Register (with more new interrupt sources)
REG_NDMA_MASTER_CNT 0x04004100 4 New DMA Control
NDMA channels registers 0x04004104 0x70 New DMA Channels 0..3
REG_AESCNT 0x04004400 4 Encryption/Decryption Hardware...
REG_AESBLKCNT 0x04004404 4
REG_AESWRFIFO 0x04004408 4
REG_AESRDFIFO 0x0400440C 4
REG_AESCTR 0x04004420 16
REG_AESMAC 0x04004430 16
REG_AESKEY0 0x04004440 48
REG_AESKEY1 0x04004470 48
REG_AESKEY2 0x040044A0 48
REG_AESKEY3 0x040044D0 48
REG_I2CDATA 0x04004500 1 I2C Bus Data
REG_I2CCNT 0x04004501 1 I2C Bus Control
REG_SNDEXCNT 0x04004700 2 New Sound Control

New ARM9 IO registers

NAME ADDRESS WIDTH DESCRIPTION
REG_IE 0x04000210 4 Interrupt Enable Register (with new interrupt sources)
REG_IF 0x04000214 4 Interrupt Flags Register (with new interrupt sources)
SCFG_A9ROM 0x04004000 2 ROM Status (R)
SCFG_CLK 0x04004004 2 New Block Clock Control (R/W)
SCFG_RST 0x04004006 2 New Block Reset (R/W)
SCFG_EXT 0x04004008 4 Extended Features (R/W)
SCFG_MC 0x04004010 2 Memory Card Interface Status?
MBKx 0x04004040 0x24 New Shared WRAM Control (New WRAM mappable to ARM7/ARM9/DSP)
REG_NDMA_MASTER_CNT 0x04004100 4 New DMA Control
NDMA channels registers 0x04004104 0x70 New DMA Channels 0..3
REG_CAMRST 0x04004200 2 Camera Reset
REG_CAMCNT 0x04004202 2 Camera Control
REG_CAMDATA 0x04004204 4 Camera Data
REG_CAM_? 0x04004210 4 Camera ?
REG_CAM_? 0x04004214 4 Camera ?
DSP_xxx 0x04004300 0x3X XpertTeak DSP coprocessor (CEVA Inc.)
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