Difference between revisions of "NDMA"
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Line 129: | Line 129: | ||
|- | |- | ||
| 19-16 | | 19-16 | ||
− | | Block transfer word count. | + | | Block transfer word count = (1<<x) words. |
|- | |- | ||
| 27-24 | | 27-24 | ||
Line 145: | Line 145: | ||
| 31 | | 31 | ||
| Enable/busy flag. | | Enable/busy flag. | ||
+ | |} | ||
+ | |||
+ | |||
+ | == Startup modes (27-24) == | ||
+ | {| class="wikitable" border="1" | ||
+ | ! BIT | ||
+ | ! DESCRIPTION | ||
+ | |- | ||
+ | | 0 | ||
+ | | Timer 0 | ||
+ | |- | ||
+ | | 1 | ||
+ | | Timer 1 | ||
+ | |- | ||
+ | | 2 | ||
+ | | Timer 2 | ||
+ | |- | ||
+ | | 3 | ||
+ | | Timer 3 | ||
+ | |- | ||
+ | | 4 | ||
+ | | Game Card | ||
+ | |- | ||
+ | | 6 | ||
+ | | V-Blank | ||
+ | |- | ||
+ | | 7 | ||
+ | | H-Blank | ||
+ | |- | ||
+ | | 8 | ||
+ | | Display | ||
+ | |- | ||
+ | | 9 | ||
+ | | Work RAM | ||
+ | |- | ||
+ | | 10 | ||
+ | | Geometry FIFO | ||
+ | |- | ||
+ | | 11 | ||
+ | | Camera | ||
|} | |} |
Revision as of 05:31, 25 November 2010
Registers
There's 4 NDMA channels. Arm7/Arm9 have separate NDMA.
NAME | ADDRESS | WIDTH |
---|---|---|
REG_NDMAGCNT | 0x04004100 | 4 |
REG_NDMASAD(n) | 0x04004104 + (n*0x1c) | 4 |
REG_NDMADAD(n) | 0x04004108 + (n*0x1c) | 4 |
REG_NDMATCNT(n) | 0x0400410c + (n*0x1c) | 4 |
REG_NDMAWCNT(n) | 0x04004110 + (n*0x1c) | 4 |
REG_NDMABCNT(n) | 0x04004114 + (n*0x1c) | 4 |
REG_NDMAFDATA(n) | 0x04004118 + (n*0x1c) | 4 |
REG_NDMACNT(n) | 0x0400411c + (n*0x1c) | 4 |
REG_NDMAGCNT
BIT | DESCRIPTION |
---|---|
19-16 | Cycle selection. |
31 | DMA arbitration method. 0=Fixed method, 1=Round robin |
REG_NDMASAD
BIT | DESCRIPTION |
---|---|
31-0 | Source data address. Must be multiple of 4. |
Like old DMA, REG_NDMASAD is copied to internal registers when written to.
REG_NDMADAD
BIT | DESCRIPTION |
---|---|
31-0 | Destination data address. Must be multiple of 4. |
Like old DMA, REG_NDMADAD is copied to internal registers when written to.
REG_NDMATCNT
BIT | DESCRIPTION |
---|---|
27-0 | Total number of words transferred. |
REG_NDMAWCNT
BIT | DESCRIPTION |
---|---|
23-0 | Number of words to transfer. |
REG_NDMABCNT
BIT | DESCRIPTION |
---|---|
15-0 | Interval timer. |
17-16 | Prescaler. 0=System freq, 1=1/4th freq, 2=1/16th freq, 3=1/64th freq. |
REG_NDMAFDATA
BIT | DESCRIPTION |
---|---|
31-0 | Fill data. |
REG_NDMACNT
BIT | DESCRIPTION |
---|---|
11-10 | Destination address update method. |
12 | Destination address reload flag. |
14-13 | Source address update method. |
15 | Source address reload flag. |
19-16 | Block transfer word count = (1<<x) words. |
27-24 | Startup mode. |
28 | Immediate mode. |
29 | Repeating mode. |
30 | IRQ enable |
31 | Enable/busy flag. |
Startup modes (27-24)
BIT | DESCRIPTION |
---|---|
0 | Timer 0 |
1 | Timer 1 |
2 | Timer 2 |
3 | Timer 3 |
4 | Game Card |
6 | V-Blank |
7 | H-Blank |
8 | Display |
9 | Work RAM |
10 | Geometry FIFO |
11 | Camera |