DSiBrew

NDMA: Difference between revisions

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|  11-10
|  Destination address update method.
|  Destination address update method. 0=Increment, 1=Decrement, 2=Fixed.
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|  14-13
|  Source address update method.
|  Source address update method. 0=Increment, 1=Decrement, 2=Fixed, 3=No address (for filling)
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|  19-16
|  19-16
|  Block transfer word count.
|  Block transfer word count = (1<<x) words.
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|  27-24
|  27-24
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|  Enable/busy flag.
|  Enable/busy flag.
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== Startup modes (27-24) for ARM9 ==
{| class="wikitable" border="1"
!  VALUE
!  DESCRIPTION
|-
|  0
|  Timer 0
|-
|  1
|  Timer 1
|-
|  2
|  Timer 2
|-
|  3
|  Timer 3
|-
|  4
|  Game Card
|-
|  6
|  V-Blank
|-
|  7
|  H-Blank
|-
|  8
|  Display
|-
|  9
|  Work RAM
|-
|  10
|  Geometry FIFO
|-
|  11
|  Camera
|}
== Startup modes (27-24) for ARM7 ==
{| class="wikitable" border="1"
!  VALUE
!  DESCRIPTION
|-
|  0
|  Timer 0
|-
|  1
|  Timer 1
|-
|  2
|  Timer 2
|-
|  3
|  Timer 3
|-
|  4
|  Game Card
|-
|  6
|  V-Blank
|-
|  7
|  Wireless
|-
|  8
|  SD I/F 1
|-
|  9
|  SD I/F 2
|-
|  10
|  AES in
|-
|  11
|  AES out / MIC(?)
|-
|  12
|  MIC(?)
|}
== Block transfers ==
First, a word is always 32 bits. Second, the block transfer specified in REG_NDMACNT is the smallest atom of data that will be transferred in a burst. The bus is monopolized until this block is transferred, without splitting up.
The next block transfer will happen after the specified time in the REG_NDMABCNT interval timer, until done.
== Immediate mode ==
Transfers the words specified in REG_NDMAWCNT immediately following block transfer rules. REG_NDMATCNT and repeating mode are ignored.
== Repeating mode ==
Transfers the words specified in REG_NDMAWCNT following the startup mode event. REG_DMATCNT is ignored.
== No immediate and no repeating mode ==
Transfers the words specified in REG_NDMAWCNT for each startup event, and gets disabled when the total number of words in REG_NDMATCNT are transferred.
Retrieved from "https://dsibrew.org/wiki/NDMA"