Hardware: Difference between revisions
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DSi XL images, word specs a bit better |
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== Specifications == | == Specifications == | ||
* [[Cameras| | * [[Cameras|Two Aptina MT9V113 0.3 Megapixel VGA Cameras]] | ||
* 240MB(+16MB probably reserved for wear leveling purposes (e.g. replacing bad blocks)) | * 240MB(+16MB probably reserved for wear leveling purposes (e.g. replacing bad blocks)) eMMC NAND - Samsung KMAPF0000M-S998 Movi[[NAND]] | ||
* 16MB RAM - NEC uPD 46128512AF1 | * 16MB RAM - NEC uPD 46128512AF1 DDR SRAM or a Fujitsu 128-Mbit FCRAM 82DBS08164D-70L (datasheet: http://edevice.fujitsu.com/fj/DATASHEET/e-ds/e511454.pdf mirror:[[Media:E511454.pdf]] | ||
* (2) 256 x 192 3.25 Inch Displays, one of which has a resistive touch screen | * (2) 256 x 192 3.25 Inch Displays, one of which has a resistive touch screen | ||
* Backwards compatible with Nintendo DS games but not GBA games due to the lack of a gameboy cartridge port. | * Backwards compatible with Nintendo DS games, but not GBA games due to the lack of a gameboy cartridge port. | ||
* Integrated | * Integrated ARM946E-S core clocked at 133 MHz in real mode and downclocked to 66 MHz for compatibility mode. ARM7TDMI at 33 MHz | ||
* PAIC3000D Touchscreen and sound controller - possibly a TI codec: TSC2117 | * PAIC3000D Touchscreen and sound controller - possibly a TI codec: TSC2117 | ||
* Mitsumi (MM3317A) or TI 72071B0 or NEC UPD68878Y04 - Power management controller. (The charger circuit itself is fully analog, and closer to the charging port.) | * Mitsumi (MM3317A) or TI 72071B0 or NEC UPD68878Y04 - Power management controller. (The charger circuit itself is fully analog, and closer to the charging port.) | ||
* SD/SDHC Card slot | * SD/SDHC Card slot | ||
* [[WiFi_Module]] with integrated 128KB SPI Flash for [[NVRAM]], WiFi settings | * [[WiFi_Module]] with integrated 128KB SPI Flash for [[NVRAM]], WiFi settings | ||
* BPTWL - Microcontroller based on a NEC uPD78F0500 used as "Super I/O"/"Embedded controller", used for battery charge level monitoring, volume settings, power-on sequencing of various modules (SoC, Wifi, ...), basic troubleshooting of the power supplies. Controls the status LEDs in the hinge. | * BPTWL - Microcontroller based on a NEC uPD78F0500 used as "Super I/O"/"Embedded controller", used for battery charge level monitoring, volume settings, power-on sequencing of various modules (SoC, Wifi, ...), basic troubleshooting of the power supplies. Controls the status LEDs in the hinge, and the camera LED (near the outer camera). | ||
== Hardware Revisions == | == Hardware Revisions == | ||
== DSi == | === DSi === | ||
* board C/TWL-CPU-01 (Original rev, all pictures below) | * board C/TWL-CPU-01 (Original rev, all pictures below) | ||
* CPU: TWL. The latest date code picture I could find online was "0836 1m" as shown below, however other pictures with CPU covered show the NAND codes as late as 916, so... | * CPU: TWL. The latest date code picture I could find online was "0836 1m" as shown below, however other pictures with CPU covered show the NAND codes as late as 916, so... | ||
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* Wireless card DWM-W015 | * Wireless card DWM-W015 | ||
== DSi RevA == | === DSi RevA === | ||
* board C/TWL-CPU-10 (Newer model, can someone provide a date or serial # range?) | * board C/TWL-CPU-10 (Newer model, can someone provide a date or serial # range?) | ||
* CPU: TWL A. Mine is "0940 2m". My US Serial # is ~ TW71848???[5]. If yours is earlier, please update this. | * CPU: TWL A. Mine is "0940 2m". My US Serial # is ~ TW71848???[5]. If yours is earlier, please update this. | ||
== DSi XL == | === DSi XL === | ||
* board C/UTL-CPU-01 | * board C/UTL-CPU-01 | ||
* CPU is TWL A | * CPU is TWL A | ||
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== Images == | == Images == | ||
== Front == | === DSi Front === | ||
[[Image:Twl_front.jpg]] | [[Image:Twl_front.jpg]] | ||
[[Image:Twl_front_traces.jpg|600px]] | [[Image:Twl_front_traces.jpg|600px]] | ||
[[Image:TWL-CPU-10.png]] | |||
The socket to the left of the ARM processor is the wifi chip socket. | The socket to the left of the ARM processor is the wifi chip socket. | ||
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TWL CPU pinout map: [[File:Twl_cpu_pinout.pdf]] (WIP) | TWL CPU pinout map: [[File:Twl_cpu_pinout.pdf]] (WIP) | ||
== Back == | === DSi Back === | ||
[[Image:Twl_back.jpg]] | [[Image:Twl_back.jpg]] | ||
=== CPU with New RAM === | |||
[[Image:CPUv2.jpg]] | |||
=== DSi XL Front === | |||
[[Image:Utl-cpu-01-sideb.jpg|600px]] | |||
=== DSi XL Back === | |||
[[Image:Utl-cpu-01-sidea.jpg|600px]] | |||
== NAND Pinout == | == NAND Pinout == | ||
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[[Image:Dsi_nanddat.png|600px]] | [[Image:Dsi_nanddat.png|600px]] | ||
=== DSi === | === DSi === | ||
[[Image:NAND_Compressed.jpg|600px]] | [[Image:NAND_Compressed.jpg|600px]] | ||
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== PCB Overlay == | == PCB Overlay == | ||
=== DSi === | |||
[[Image:Nintendo DSi PCB Layered.jpg|600px]] | [[Image:Nintendo DSi PCB Layered.jpg|600px]] | ||
=== DSi XL === | |||
[[Image:Utl-pcb-overlay.jpg|600px]] | |||
== Glamor Shot == | == Glamor Shot == | ||