Stage2: Difference between revisions
be more detailed about RSA pubkey stuff |
→Stage2 operations: more info about what stage2 does |
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After Stage 2 is loaded: | After Stage 2 is loaded: | ||
# Main RAM (aka FCRAM aka DRAM) is allowed bus access (using the EXMEMCNT MMIO register) and initialized. | # Main RAM (aka FCRAM aka DRAM) is allowed bus access (using the EXMEMCNT MMIO register) and initialized. | ||
# The status registers of the BPTWL are read to check whether this is a warmboot. The powerbutton action of the BPTWL is reset as well. | |||
# The NAND flash is partially re-initialized | # The NAND flash is partially re-initialized | ||
# Various hardware components, such as the touchscreen/sound controller, Wifi chip, etc. are initialized. (Cameras aren't initialized, though.) | |||
# Sector 0 is read from the NAND. This is an (encrypted) DOS-style MBR. | # Sector 0 is read from the NAND. This is an (encrypted) DOS-style MBR. | ||
# The MBR signature and the type of the first partition are verified. | # The MBR signature and the type of the first partition are verified. | ||