IO Map - Revision history

Nocash: /* New ARM7 IO registers */

2013-07-28T03:12:55Z

New ARM7 IO registers

@@ Line 25: / Line 25: @@
 |  4
 |  New Interrupt Flags Register (with more new interrupt sources)
 |-
 |  [[NDMA|REG_NDMA_MASTER_CNT]]

Nocash at 14:17, 16 July 2013

2013-07-16T12:17:25Z

← Older revision		Revision as of 16:17, 16 July 2013
Line 4:		Line 4:
	! ADDRESS		! ADDRESS
	! WIDTH		! WIDTH
			! DESCRIPTION
			\|-
			\| [[Interrupts\|REG_IE]]
			\| 0x04000210
			\| 4
			\| Interrupt Enable Register (with new interrupt sources)
			\|-
			\| REG_IF
			\| 0x04000214
			\| 4
			\| Interrupt Flags Register (with new interrupt sources)
	\|-		\|-
	\| [[Interrupts\|REG_IE2]]		\| [[Interrupts\|REG_IE2]]
	\| 0x04000218		\| 0x04000218
	\| 4		\| 4
			\| New Interrupt Enable Register (with more new interrupt sources)
	\|-		\|-
	\| REG_IF2		\| REG_IF2
	\| 0x0400021C		\| 0x0400021C
	\| 4		\| 4
			\| New Interrupt Flags Register (with more new interrupt sources)
			\|-
			\| [[NDMA\|REG_NDMA_MASTER_CNT]]
			\| 0x04004100
			\| 4
			\| New DMA Control
			\|-
			\| [[NDMA]] channels registers
			\| 0x04004104
			\| 0x70
			\| New DMA Channels 0..3
	\|-		\|-
	\| [[AES_Engine\|REG_AESCNT]]		\| [[AES_Engine\|REG_AESCNT]]
	\| 0x04004400		\| 0x04004400
	\| 4		\| 4
			\| Encryption/Decryption Hardware...
	\|-		\|-
	\| REG_AESBLKCNT		\| REG_AESBLKCNT
Line 56:		Line 80:
	\| 0x04004500		\| 0x04004500
	\| 1		\| 1
			\| I2C Bus Data
	\|-		\|-
	\| REG_I2CCNT		\| REG_I2CCNT
	\| 0x04004501		\| 0x04004501
	\| 1		\| 1
			\| I2C Bus Control
	\|-		\|-
	\| [[SNDEX\|REG_SNDEXCNT]]		\| [[SNDEX\|REG_SNDEXCNT]]
	\| 0x04004700		\| 0x04004700
	\| 2		\| 2
			\| New Sound Control
	\|}		\|}

Line 71:		Line 98:
	! ADDRESS		! ADDRESS
	! WIDTH		! WIDTH
			! DESCRIPTION
			\|-
			\| [[Interrupts\|REG_IE]]
			\| 0x04000210
			\| 4
			\| Interrupt Enable Register (with new interrupt sources)
			\|-
			\| REG_IF
			\| 0x04000214
			\| 4
			\| Interrupt Flags Register (with new interrupt sources)
			\|-
			\| SCFG_A9ROM
			\| 0x04004000
			\| 2
			\| ROM Status (R)
			\|-
			\| SCFG_CLK
			\| 0x04004004
			\| 2
			\| New Block Clock Control (R/W)
			\|-
			\| SCFG_RST
			\| 0x04004006
			\| 2
			\| New Block Reset (R/W)
			\|-
			\| SCFG_EXT
			\| 0x04004008
			\| 4
			\| Extended Features (R/W)
			\|-
			\| SCFG_MC
			\| 0x04004010
			\| 2
			\| Memory Card Interface Status?
			\|-
			\| MBKx
			\| 0x04004040
			\| 0x24
			\| New Shared WRAM Control (New WRAM mappable to ARM7/ARM9/DSP)
			\|-
			\| [[NDMA\|REG_NDMA_MASTER_CNT]]
			\| 0x04004100
			\| 4
			\| New DMA Control
			\|-
			\| [[NDMA]] channels registers
			\| 0x04004104
			\| 0x70
			\| New DMA Channels 0..3
	\|-		\|-
	\| [[Cameras#Camera_registers\|REG_CAMRST]]		\| [[Cameras#Camera_registers\|REG_CAMRST]]
	\| 0x04004200		\| 0x04004200
	\| 2		\| 2
			\| Camera Reset
	\|-		\|-
	\| REG_CAMCNT		\| REG_CAMCNT
	\| 0x04004202		\| 0x04004202
	\| 2		\| 2
			\| Camera Control
	\|-		\|-
	\| REG_CAMDATA		\| REG_CAMDATA
	\| 0x04004204		\| 0x04004204
	\| 4		\| 4
	\|}		\| Camera Data
			\|-
	~~== New ARM7/ARM9 IO registers ==~~		\| REG_CAM_?
	{\| ~~class="wikitable" border="1"~~		\| 0x04004210
	! ~~NAME~~		\| 4
	! ~~ADDRESS~~		\| Camera ?
	! ~~WIDTH~~
	\|-		\|-
	\| ~~[[NDMA\|REG_NDMA_MASTER_CNT]]~~		\| REG_CAM_?
	\| ~~0x04004100~~		\| 0x04004214
	\| 4		\| 4
			\| Camera ?
	\|-		\|-
	\| ~~[[NDMA]] channels registers~~		\| DSP_xxx
	\| ~~0x04004104~~		\| 0x04004300
	\| ~~0x70~~		\| 0x3X
			\| XpertTeak DSP coprocessor (CEVA Inc.)
	\|}		\|}

Yellows8: /* New ARM9 IO registers */

2011-08-06T19:36:06Z

New ARM9 IO registers

← Older revision		Revision as of 23:36, 6 August 2011
Line 72:		Line 72:
	! WIDTH		! WIDTH
	\|-		\|-
	\| [[Cameras#Camera_registers\|~~REG_CAMUNK~~]]		\| [[Cameras#Camera_registers\|REG_CAMRST]]
	\| 0x04004200		\| 0x04004200
	\| 2		\| 2

Yellows8 at 05:01, 6 August 2011

2011-08-06T03:01:01Z

← Older revision		Revision as of 07:01, 6 August 2011
Line 66:		Line 66:
	\|}		\|}

	== New ~~Arm7/Arm9~~ IO registers ==		== New ARM9 IO registers ==
	{\| class="wikitable" border="1"		{\| class="wikitable" border="1"
	! NAME		! NAME
Line 72:		Line 72:
	! WIDTH		! WIDTH
	\|-		\|-
	\| [[~~NDMA~~\|~~REG_NDMA_MASTER_CNT~~]]		\| [[Cameras#Camera_registers\|REG_CAMUNK]]
	\| ~~0x04004100~~		\| 0x04004200
	\| 4		\| 2
	\|-		\|-
	\| ~~REG_NDMA_SRC(n)~~		\| REG_CAMCNT
	\| ~~0x04004104 + (n*0x1c)~~		\| 0x04004202
	\| 4		\| 2
	\|-		\|-
	\| ~~REG_NDMA_DEST(n)~~		\| REG_CAMDATA
	\| ~~0x04004108 + (n*0x1c)~~		\| 0x04004204
	\| 4		\| 4
			\|}

			== New ARM7/ARM9 IO registers ==
			{\| class="wikitable" border="1"
			! NAME
			! ADDRESS
			! WIDTH
	\|-		\|-
	\| ~~REG_NDMA_NUM0(n)~~		\| [[NDMA\|REG_NDMA_MASTER_CNT]]
	~~\| 0x0400410c + (n*0x1c)~~		\| 0x04004100
	~~\| 4~~
	\|-
	~~\| REG_NDMA_NUM1(n)~~
	~~\| 0x04004110 + (n*0x1c)~~
	~~\| 4~~
	\|-
	~~\| REG_NDMA_14(n)~~
	~~\| 0x04004114 + (n*0x1c)~~
	~~\| 4~~
	\|-
	\| ~~REG_NDMA_CLEAR(n)~~
	\| ~~0x04004118 + (n*0x1c)~~
	\| 4		\| 4
	\|-		\|-
	\| ~~REG_NDMA_CNT(n)~~		\| [[NDMA]] channels registers
	\| ~~0x0400411c + (n*0x1c)~~		\| 0x04004104
	\| 4		\| 0x70
	\|}		\|}

Yellows8: Added NDMA registers.

2010-11-08T21:49:38Z

Added NDMA registers.

@@ Line 64: / Line 64: @@
 |  0x04004700
 |  2
 |}

Yellows8: Added links to other pages.

2010-07-16T13:38:54Z

Added links to other pages.

← Older revision		Revision as of 17:38, 16 July 2010
Line 5:		Line 5:
	! WIDTH		! WIDTH
	\|-		\|-
	\| REG_IE2		\| [[Interrupts\|REG_IE2]]
	\| 0x04000218		\| 0x04000218
	\| 4		\| 4
Line 13:		Line 13:
	\| 4		\| 4
	\|-		\|-
	\| REG_AESCNT		\| [[AES_Engine\|REG_AESCNT]]
	\| 0x04004400		\| 0x04004400
	\| 4		\| 4
Line 53:		Line 53:
	\| 48		\| 48
	\|-		\|-
	\| REG_I2CDATA		\| [[I2C_Bus\|REG_I2CDATA]]
	\| 0x04004500		\| 0x04004500
	\| 1		\| 1
Line 61:		Line 61:
	\| 1		\| 1
	\|-		\|-
	\| REG_SNDEXCNT		\| [[SNDEX\|REG_SNDEXCNT]]
	\| 0x04004700		\| 0x04004700
	\| 2		\| 2
	\|}		\|}

Neimod at 19:44, 10 July 2010

2010-07-10T17:44:03Z

← Older revision		Revision as of 21:44, 10 July 2010
Line 60:		Line 60:
	\| 0x04004501		\| 0x04004501
	\| 1		\| 1
			\|-
			\| REG_SNDEXCNT
			\| 0x04004700
			\| 2
	\|}		\|}

Neimod at 19:42, 10 July 2010

2010-07-10T17:42:32Z

← Older revision		Revision as of 21:42, 10 July 2010
Line 52:		Line 52:
	\| 0x040044D0		\| 0x040044D0
	\| 48		\| 48
			\|-
	\| REG_I2CDATA		\| REG_I2CDATA
	\| 0x04004500		\| 0x04004500

Neimod at 19:42, 10 July 2010

2010-07-10T17:42:21Z

← Older revision		Revision as of 21:42, 10 July 2010
Line 52:		Line 52:
	\| 0x040044D0		\| 0x040044D0
	\| 48		\| 48
			\| REG_I2CDATA
			\| 0x04004500
			\| 1
			\|-
			\| REG_I2CCNT
			\| 0x04004501
			\| 1
	\|}		\|}

Neimod at 19:41, 10 July 2010

2010-07-10T17:41:33Z

← Older revision		Revision as of 21:41, 10 July 2010
Line 5:		Line 5:
	! WIDTH		! WIDTH
	\|-		\|-
			\| REG_IE2
	\| 0x04000218		\| 0x04000218
	\| 4		\| 4
	~~\| REG_IE2~~
	\|-		\|-
			\| REG_IF2
	\| 0x0400021C		\| 0x0400021C
	\| 4		\| 4
	~~\| REG_IF2~~
	\|-		\|-
	\| REG_AESCNT		\| REG_AESCNT