View source for IO Map

== New ARM7 IO registers ==
{| class="wikitable" border="1"
!  NAME
!  ADDRESS
!  WIDTH
!  DESCRIPTION
|-
|  [[Interrupts|REG_IE]]
|  0x04000210
|  4
|  Interrupt Enable Register (with new interrupt sources)
|-
|  REG_IF
|  0x04000214
|  4
|  Interrupt Flags Register (with new interrupt sources)
|-
|  [[Interrupts|REG_IE2]]
|  0x04000218
|  4
|  New Interrupt Enable Register (with more new interrupt sources)
|-
|  REG_IF2
|  0x0400021C
|  4
|  New Interrupt Flags Register (with more new interrupt sources)
|-
|  SCFG_?
|  0x04004000
|  1
|  Unknown, used by BIOS
|-
|  SCFG_?
|  0x04004001
|  1
|  Unknown, used by BIOS
|-
|  MBK_?
|  0x04004060
|  1
|  Unknown, used by BIOS
|-
|  MBK_?
|  0x04004061
|  1
|  Unknown, used by BIOS
|-
|  MBK_?
|  0x04004062
|  1
|  Unknown, used by BIOS
|-
|  [[NDMA|REG_NDMA_MASTER_CNT]]
|  0x04004100
|  4
|  New DMA Control
|-
|  [[NDMA]] channels registers
|  0x04004104
|  0x70
|  New DMA Channels 0..3
|-
|  [[AES_Engine|REG_AESCNT]]
|  0x04004400
|  4
|  Encryption/Decryption Hardware...
|-
| REG_AESBLKCNT
|  0x04004404
|  4
|-
|  REG_AESWRFIFO
|  0x04004408
|  4
|-
|  REG_AESRDFIFO
|  0x0400440C
|  4
|-
|  REG_AESCTR
|  0x04004420
|  16
|-
|  REG_AESMAC
|  0x04004430
|  16
|-
|  REG_AESKEY0
|  0x04004440
|  48
|-
|  REG_AESKEY1
|  0x04004470
|  48
|-
|  REG_AESKEY2
|  0x040044A0
|  48
|-
|  REG_AESKEY3
|  0x040044D0
|  48
|-
|  [[I2C_Bus|REG_I2CDATA]]
|  0x04004500
|  1
|  I2C Bus Data
|-
|  REG_I2CCNT
|  0x04004501
|  1
|  I2C Bus Control
|-
|  [[SNDEX|REG_SNDEXCNT]]
|  0x04004700
|  2
|  New Sound Control
|}

== New ARM9 IO registers ==
{| class="wikitable" border="1"
!  NAME
!  ADDRESS
!  WIDTH
!  DESCRIPTION
|-
|  [[Interrupts|REG_IE]]
|  0x04000210
|  4
|  Interrupt Enable Register (with new interrupt sources)
|-
|  REG_IF
|  0x04000214
|  4
|  Interrupt Flags Register (with new interrupt sources)
|-
|  SCFG_A9ROM
|  0x04004000
|  2
|  ROM Status (R)
|-
|  SCFG_CLK
|  0x04004004
|  2
|  New Block Clock Control (R/W)
|-
|  SCFG_RST
|  0x04004006
|  2
|  New Block Reset (R/W)
|-
|  SCFG_EXT
|  0x04004008
|  4
|  Extended Features (R/W)
|-
|  SCFG_MC
|  0x04004010
|  2
|  Memory Card Interface Status?
|-
|  MBKx
|  0x04004040
|  0x24
|  New Shared WRAM Control (New WRAM mappable to ARM7/ARM9/DSP)
|-
|  [[NDMA|REG_NDMA_MASTER_CNT]]
|  0x04004100
|  4
|  New DMA Control
|-
|  [[NDMA]] channels registers
|  0x04004104
|  0x70
|  New DMA Channels 0..3
|-
|  [[Cameras#Camera_registers|REG_CAMRST]]
|  0x04004200
|  2
|  Camera Reset
|-
|  REG_CAMCNT
|  0x04004202
|  2
|  Camera Control
|-
|  REG_CAMDATA
|  0x04004204
|  4
|  Camera Data
|-
|  REG_CAM_?
|  0x04004210
|  4
|  Camera ?
|-
|  REG_CAM_?
|  0x04004214
|  4
|  Camera ?
|-
|  DSP_xxx
|  0x04004300
|  0x3X
|  XpertTeak DSP coprocessor (CEVA Inc.)
|}