Difference between revisions of "DSi cartridge header"
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| Line 80: | Line 80: | ||
| 4 | | 4 | ||
| ARM7 SCFG EXT mask (controls which devices to enable) | | ARM7 SCFG EXT mask (controls which devices to enable) | ||
| + | |- | ||
| + | | 0x1BC | ||
| + | | 4 | ||
| + | | ... | ||
|- | |- | ||
| 0x1C0 | | 0x1C0 | ||
Revision as of 19:33, 24 November 2009
| OFFSET | SIZE | DESCRIPTION |
|---|---|---|
| 0x000 | 12 | Game Title |
| 0x00C | 4 | Gamecode |
| 0x010 | 2 | Makercode |
| 0x012 | 1 | Unitcode |
| 0x013 | 1 | Encryption seed select |
| 0x014 | 1 | Devicecapacity |
| 0x015 | 9 | Reserved |
| 0x01E | 1 | ROM Version |
| 0x01F | 1 | Autostart |
| 0x020 | 4 | FLX ARM9 rom offset |
| 0x024 | 4 | FLX ARM9 entry address |
| 0x028 | 4 | FLX ARM9 load address |
| 0x02C | 4 | FLX ARM9 size |
| 0x030 | 4 | FLX ARM7 rom offset |
| 0x034 | 4 | FLX ARM7 entry address |
| 0x038 | 4 | FLX ARM7 load address |
| 0x03C | 4 | FLX ARM7 size |
| ... | ... | Fill me in |
| 0x1B8 | 4 | ARM7 SCFG EXT mask (controls which devices to enable) |
| 0x1BC | 4 | ... |
| 0x1C0 | 4 | LTD ARM9 rom offset |
| 0x1C4 | 4 | ? |
| 0x1C8 | 4 | LTD ARM9 load address |
| 0x1CC | 4 | LTD ARM9 size |
| 0x1D0 | 4 | LTD ARM7 rom offset |
| 0x1D4 | 4 | ? |
| 0x1D8 | 4 | LTD ARM7 load address |
| 0x1DC | 4 | LTD ARM7 size |
| ... | ... | ... |
| 0x230 | 8 | Title ID |
| ... | ... | ... |
| 0xE00 | 0x180 | Reserved and unchecked region, always zero |
| 0xF80 | 0x80 | RSA signature |
The first 0xE00 bytes of the SRL header is signed with an 1024-bit RSA signature.